In a previous post I mentioned Semi Trends as a nice semiconductor news site to catch up on semiconductor industry happenings. It was simple, easy to navigate, and updated more or less on a regular basis. Well, compared to SemiTrends, eeNewsFeed.com feels like a two hundred pound gorilla. Don’t expect any personal commentary on this site. The first impression will tell you immediately that this site is all about industry news aggregation, with the home page brimming with article snippets to the point where it feels utterly cluttered and unreadable. But this site’s strength is not the home page but what lies beyond it. The main navigation menu is broken down into categories that seasoned designers will easily recognize. One thing that visitors might find handy is the company profiles section, which allows alphabetical and industry based searches for companies of interest. The search returns a brief description of the company as well as any feeds that are directly linked to this company. Alternatively, one can search general news for a subject of interest, and the search will return articles that contain the query as well as the feed from which the article came.

As implied by the name, feeds and feed management are what eeNewsFeed is all about. As show on the right, once you sign up for a free account, you can generate watchlists which can be organized as individual folders. These folders can then be assigned feeds of interest, which can either be company related feeds, feeds pertaining to specific articles, or feeds based on search criteria. For example, many companies have feeds for press releases or new product announcements which you can add to your watchlist. eeNewsFeed also features aggregate feeds that combine several feeds for a company into one. These feeds are company specific and will only contain items directly related to that company. On the other hand, feeds from articles that matched your query are generally feeds from a specific new source, such as EETimes.com. Obviously these feeds will contain a variety of articles on topics that may or may not be of interest to the reader. Feeds can also be created based entirely on your search query. Thus any article that matches your query in the future will show up in this feed. Each folder, or watchlist, can be configured individually to send you email alerts either on a regular schedule or when new articles become available.

While all of the functionality is relatively simple to setup and quite intuitive, whether it is actually better than feed management that can be found either through browser extensions or other online feeds management sites is  questionable. Still, the strength of this site lies in the fact that it is entirely focused on electronics engineering, and thus search results and the related feeds are likely to be far more relevant than what one would obtain by using one of the generic search engines. One area that the site could surely improve on is search speed. While the results are delivered in a reasonable time, the response is significantly slower than regular search engines. Overall though, if you need your daily dose of semiconductor news, and you want to customize it to fit your criteria, eeNewsFeed is hard to beat.

SPICE simulations are the essential tool for any circuit designer. Without an accurate SPICE simulator a company might as well forget about reasonable yields when the chip finally tapes out. Nevertheless, with the ever increasing device counts and thus netlists, chip designers have had to make a choice between acceptable accuracy and reasonable runtimes. To overcome this tradeoff, circuit designers have been using many tricks to make current designs possible. For example, instead of simulating an entire block, a particular path of interest can be pruned and then simulated. Another trick is to mix and match extracted cells with cells for which parasitic are estimated on the flight. Yet another approach is to utilize fast-spice simulators, which instead of simulating each device and solving the equations associated with it, employ device switching approximations to estimate how the circuit is going to behave. Regardless, not matter how you slice and dice it, accuracy of the simulation is compromised in each case.

But usually, where there is an interesting problem to solve, you can expect a startup to emerge trying to solve it. Case in point, Cupentino, California based Xoomsys Technology. Backed by Benchmark Capital, Morgenthaler Ventures, and Duff Ackerman & Goodrich, and have just finished second round funding which netted the company a nice $8 million, Xoomsys believe they have found a reasonable solution for the circuit designer’s dilemma. As the illustration below shows, Xoomsys proposes to parallelize the simulation onto a cluster of x86 machines.

The approach is quite elegant and is implemented via what the company refers to as Scalable Performance using Enhanced Effective Decoupling, or SPEED for short. In layman’s terms, SPEED takes an existing netlist and parses it into individual and smaller netlists that can then be sent off to multiple systems that run a regular SPICE simulator on each of the netlists in parallel. The breakthrough here is the ability for Xoomsys the parse the initial netlist in such a way as to minimize the communication between the parallel machines while at the same time balancing the load across all the machines. The minimization in communication is accomplished by figuring out which parts of the netlists are mostly decoupled from each other and as such can be simulated individually. Most importantly, Xoomsys guarantees that the final output of the simulation, when all the pieces are combined back together, will be identical to that of a regular SPICE simulation that would have run on the original netlist. As such, what Xoomsys offers is more of an extension that enables a company to utilize their preferred SPICE engine more efficiently.  And while performance numbers are not listed anywhere on the site, the technology itself seems quite promising.

In general, publicity is good thing for a company – so it is nice to see XMOS Semiconductor finally emerging from stealth-mode and providing some information to the public on their company and what they claim to be a revolutionary new type of programmable semiconductor technology called Software-Defined Silicon (SDS). Now don’t get too excited, the web site is still relatively sparse on details, but a quick email to XMOS resulted in a nice presentation style response that provided more insight. Founded in 2005 and backed by Amadeus Capital Partners and Esprit Capital Partners, XMOS currently consist of a team of 25 people out of Bristol, England. The company is headed by James Foster, who has previously held a CEO position at Oxford Semiconductor and before that held various engineering positions at Lucent and Lattice Semiconductor. The CTO for the company is David May, who is well known for his invention of the Transputer and the OCCAM programming language

According to XMOS, SDS will provide designers with the advantages that are usually associated with System on a Chip (SOC) solutions while at the same time providing the flexibility that FPGAs offer. SDS is implemented as an array of XCore event driven multi-threaded processor elements which are linked via an XLink inter-core communication link, both of which can be easily programmed and configured through XC - an XMOS C-style proprietary language. The advantage of this approach is that the whole system can be specified using a high-level language and no more RTL coding is necessary. Further, the whole system can be reconfigured in about the same time that it takes to recompile the actual code. The chart below summarizes the advantages of SDS versus competing technologies:

Designing ASICs is very risky unless you have really high volumes. ASSPs are less costly, but since they are sold to many companies, differentiation becomes difficult. FPGAs have almost everything going for them - except that they are very silicon inefficient, which makes them expensive and utterly unusable for high-volume consumer products that have very low margins.  The fashion criterion displayed in the chart is utterly beyond me, but as you can see SDS is fashionable as well. On the performance front, the XCore is expected to yield a performance in the 500 MIPS range. Also, developers will be able to dynamically partition resources between control processing (MIPS), DSP processing (MSPS), and I/O processing (Mbps). The key to SDS success will be whether or not XMOS will be able to deliver a robust and intuitive programming environment; without this ability most developers will likely shy away since there is nothing more frustrating than dealing with buggy tools. More technical details of the architecture and tools are scheduled to be released in Q4 of 2007 and the launch of the first device family with the complete tools set and IP library is to follow in Q1 of 2008.